The present invention relates to a semiconductor device manufacturing method, a semiconductor wafer and a semiconductor device.
There is known a semiconductor device manufacturing method includes the steps for forming devices on the surface of a semiconductor wafer, forming an overcoat on the surface of the semiconductor wafer with, for example, polyimide resin, mounting the semiconductor wafer upside down on the table of a polishing device with an intervening film in order to polish the back surface of semiconductor wafer while applying pressure by a revolving grinder.
It is disclosed in JP S59-229829A that in polishing the semiconductor wafer, an overcoat is formed on the surface of the semiconductor wafer so as to protect the devices formed on its surface with openings formed in electrode pad sections on the overcoat. It is disclosed in JP S64-069013A that an overcoat is formed and further a tape is stuck thereto so as to protect the devices in polishing process.
However, in the case of power semiconductor devices such as IGBTs (Insulated Gate Bipolar Transistor), the thickness of the devices, i.e., the thickness of the wafer, should be as small as 200 μm or less. Consequently, in conventional manufacturing methods for semiconductor devices, the film sometimes sags due to the actions of the turning effect and the pressure by a grinder in the polishing device, as a result of which strong stress is produced on the overcoat that is in contact with the sagging film, resulting in cracking of the overcoat during polishing process. This is more noticeable in those devices which require a longer polishing time, i.e., those devices which require a thinner wafer. Consequently, quite a number of devices become defective as the devices (inside thereof) are damaged when the overcoat cracks, the overcoat does not fulfill its original function so that an interconnection layer on the surface of the chip is disconnected or deformed due to the pressure of resin applied at the time of package molding, or water gets into cracked sections to cause characteristic error such as deterioration and fluctuation of withstand voltage.